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this is information on a product in full production. january 2014 docid023772 rev 3 1/13 stptic parascan? tunable integrated capacitor datasheet - production data features ? high power capability (+36 dbm) ? high tuning range (3.5/1) ? high quality factor (q) ? high linearity device ? low leakage current ? capacitor bias is dc blocked ? frequency of operation from dc to 3 ghz ? 8 values available: 1.2 pf, 2.7 pf, 3.3 pf, 3.9 pf, 4.7 pf, 5.6 pf, 6.8 pf and 8.2 pf ? analog control voltage ? compatible with high voltage control ic (sthvdac series) ? available in plastic molded package: ? qfn package 1.2 x 1.6 x 0.9 mm ? flip chip 0.65 x 1.0 x 0.3 mm ? flip chip 0.65 x 1.2 x 0.3 mm ? ecopack ? 2 compliant component benefit ? rf tunable passive implementation in mobile phones to optimize antenna radiated performances. applications ? cellular antenna tunable matching network in multi-band gsm/wcdma/lte mobile phone ? tunable rf filters ? cellular tunable antenna ? lte band tuning ? vswr correction circuit description the st integrated tunable capacitor, offers excellent rf performance, low power consumption and high linearity required in adaptive rf tuning applications. the fundamental building block of ptic is a tunable material called parascan, which is a version of barium strontium titanate (bst) developed by paratek microwave. bst capacitances are tunable capacitances intended for use in mobile phone application, and dedicated to rf tunable applications. these tunable capacitances are controlled through a bias voltage ranging from 2 to 20 v. the use of bst tunable capacitance in mobile phones enables significant improvement in terms of radiated performances making the performance almost insensitive to the external environment. tm: parascan is a trade mark of paratek microwave inc. stptic stptic qfn flip chip www.st.com
functional characteristics stptic 2/13 docid023772 rev 3 1 functional characteristics figure 1. ptic functional block diagram table 1. signal descriptions ball/pad number pin name description a1 dc bias dc bias voltage b1 rf2 rf input / output c1 rf2 rf input / output a2 nc not connected b2 rf1 rf input / output c2 rf1 rf input / output dc bias c1 a1 b1 b2 c2 a2 nc rf1 rf2 rf1 rf2
docid023772 rev 3 3/13 stptic electrical characteristics 13 2 electrical characteristics table 2. absolute maximum ratings (limiting values) symbol parameter rating unit p in input peak power rf in (cw mode)/all rf ports +36 dbm v esd(hbm) human body model, jesd22-a114-b, all i/o stptic-12 500 v stptic-27 400 (1) 1. currently failing around 400 v, improvement on going to withstand 500 v on 2p7 and 3p3. stptic-33 400 (1) stptic-39 500 stptic-47 500 stptic-56 500 stptic-68 500 stptic-82 500 v esd(mm) machine model, jesd22-a114-b, all i/o 100 v t device device temperature +125 c t stg storage temperature -55 to +150 v x bias voltage 25 v table 3. recommended operating conditions symbol parameter rating unit min. typ. max. p in rf input power (50% duty cycle mode) rf in (lb) rf in (hb) +35 +33 dbm f op operating frequency 700 3000 mhz t device device temperature +100 c t op operating temperature -30 +85 v x bias voltage 2 20 v
electrical characteristics stptic 4/13 docid023772 rev 3 table 4. representative performances (t amb = 25 c) symbol parameter conditions value unit min typ max c 2v capacitance at 2v bias stptic-12 1.08 1.20 1.32 pf stptic-27 2.43 2.7 2.97 pf stptic-33 2.97 3.3 3.63 pf stptic-39 3.51 3.9 4.29 pf stptic-47 4.23 4.7 5.17 pf stptic-56 5.04 5.6 6.16 pf stptic-68 6.12 6.8 7.48 pf stptic-82 7.38 8.2 9.02 i l leakage current measured with v bias = 20 v 100 na c tuning range ratio between c 2v /c 20v measured at 100 khz 3/1 3.5/1 q lb quality factor measured at 900 mhz 65 q hb quality factor measured at 1800 mhz 45 ip3 third order intercept point v bias = 2 v (1) and (3) 1. f 1 = 894 mhz, f 2 = 849 mhz, p 1 = 20 dbm, p 2 = -15 dbm, 2f 1 - f 2 = 939 mhz 60 dbm v bias = 20 v (1) and (3) 70 dbm h2 second harmonic v bias = 2 v (2) and (3) 2. 894 mhz, p in = 34 dbm -65 dbm v bias = 20 v (2) and (3) -65 dbm h3 third harmonic v bias = 2 v (2) and (3) -45 dbm v bias = 20 v (2) and (3) 3. ip3 and harmonics are measured in the shunt/series configuration in a 50 environment -45 dbm t t transition time from c min to c max (4) 4. one or both of rf in and rf out must be connected to dc ground 135 s from c max to c min (4) 100 s
docid023772 rev 3 5/13 stptic package information 13 3 package information ? epoxy meets ul94, v0 ? lead-free package in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. figure 2. qfn-6l package dimension figure 3. recommended pcb land pattern for qfn-6l package c 2 c 1 c2 a2 b2 b1 c1 a1 27 1.2 mm 0.05 mm 0.7 mm 0.425 mm 0.35 mm 0.03 mm 1.6 mm 0.05 mm 0.9 mm 0.1 mm 0.25 mm 0.03 mm 0.5 mm 550 m 600 m 300 m top metal nc rf1 rf1 bias nc rf2 solder mask opening rf1 rf2 rf1 250 m 300 m 200 m
package information stptic 6/13 docid023772 rev 3 figure 4. flip chip dimensions (size for 1p5) figure 5. flip chip dimensions (size for 2p7, 3p3, 3p9, and 4p7) figure 6. flip chip dimensions (size for 5p6, 6p8, 8p2) 400 m 190 m 190 m 440 m 110 m 110 m ubm pads 160 x 100 m 300 40 m 780 30 m 660 30 m 200 20 m 500m 360m 140m 440 m 105 m 105 m ubm pads 160 x 100 m 290 30 m 1000 30 m 650 30 m 200 20 m 350 m 350 m 360 m 140 m 440 m 105 m 105 m ubm pads 160 x 100 m 290 30 m 1200 30 m 650 30 m 200 20 m
docid023772 rev 3 7/13 stptic package information 13 figure 7. recommended pcb land pattern for flip chip package (metal defined pads, solder mask 25 m larger) figure 8. recommended pcb land pattern for flip chip ptic (die size 650 x 1200) 170 m 225 m 260 m 250 x 230 m 250 x 500 m 200 x 180 m 200 x 750 m solder mask metal defined pads solder mask metal defined pads ptic die size 650 x 1200 m 250 x 230 m 250 x 800 m
package information stptic 8/13 docid023772 rev 3 figure 9. qfn-6l tape and reel specification figure 10. flip chip tape and reel specification dot identifying b ump a1 location user direction of unreeling typical dimensions in mm 4.0 4.0 2.0 8.0 1.75 3.5 ? 1.55 1.05 1.45 0.25 1.85 27 27 27 user direction of unreeling typical dimensions in mm a0 = 1.12 mm for 2n7, 3p3, 3p9, and 4p7 a0 = 1.32 mm for 5p6, 6p8, and 8p2 4.0 2.0 a1 location 8.0 a0 2.0 1.75 3.5 ? 1.55 0.36 0.76 0.25
docid023772 rev 3 9/13 stptic package information 13 figure 11. qfn marking figure 12. flip chip marking (bump side view) 27 a b c 21 die die identifier on bump side
reflow profile stptic 10/13 docid023772 rev 3 4 reflow profile figure 13. st ecopack ? recommended soldering reflow profile for pcb mounting note: minimize air convection currents in the reflow oven to avoid component movement. 250 0 50 100 150 200 240 210 180 150 120 90 60 30 300 270 - 6c/s 240-245 c 2 - 3 c/s temperature (c) -2 c/s -3 c/s time (s) 0.9 c/s 60 sec (90 max) table 5. recommended values for soldering reflow profile value typical max. temperature gradient in preheat (t = 70-180 c) 0.9 c/s 3 c/s temperature gradient (t = 200-225 c) 2 c/s 3 c/s peak temperature in reflow 240-245 c 260 c time above 220 c 60 s 90 s temperature gradient in cooling -2 to -3 c/s -6 c/s time from 50 to 220 c 160 to 220 s
docid023772 rev 3 11/13 stptic ordering information 13 5 ordering information figure 14. ordering information scheme table 6. ordering information part number marking weight base qty delivery mode stptic-12f1m6 12 4.8 mg 3000 tape and reel stptic-27f1m6 27 4.8 mg 3000 tape and reel stptic-33f1m6 33 4.8 mg 3000 tape and reel stptic-39f1m6 39 4.8 mg 3000 tape and reel STPTIC-47F1M6 47 4.8 mg 3000 tape and reel stptic-56f1m6 56 4.8 mg 3000 tape and reel stptic-68f1m6 68 4.8 mg 3000 tape and reel stptic-82f1m6 82 4.8 mg 3000 tape and reel stptic-12g1h5 tbd 0.7 mg 15000 tape and reel stptic-27g1h5 i1x 0.7 mg 15000 tape and reel stptic-33g1h5 i3x 0.7 mg 15000 tape and reel stptic-39g1h5 i2x 0.7 mg 15000 tape and reel stptic-47g1h5 i5x 0.7 mg 15000 tape and reel stptic-56g1h5 i4x 0.7 mg 15000 tape and reel stptic-68g1h5 i7x 0.7 mg 15000 tape and reel stptic-82g1h5 i6x 0.7 mg 15000 tape and reel st ptic - 27 f 1 m6 stmicroelectronics parascan tunable integrated capacitor capacitor value design version package tolerance 27 = 2.7 pf m6 = qfn-6l h5 = flip chip 1 = 10%
revision history stptic 12/13 docid023772 rev 3 6 revision history table 7. document revision history date revision changes 02-nov-2012 1 initial release. 03-jul-2013 2 removed 6-pad 650 x 1000 flip-chip package. 10-jan-2014 3 updated : features , table 2 , table 4 , table 6 and added new figure 4 .
docid023772 rev 3 13/13 stptic 13 please read carefully: information in this document is provided solely in connection with st products. stmicroelectronics nv and its subsidiaries (?st ?) reserve the right to make changes, corrections, modifications or improvements, to this document, and the products and services described he rein at any time, without notice. all st products are sold pursuant to st?s terms and conditions of sale. purchasers are solely responsible for the choice, selection and use of the st products and services described herein, and st as sumes no liability whatsoever relating to the choice, selection or use of the st products and services described herein. no license, express or implied, by estoppel or otherwise, to any intellectual property rights is granted under this document. i f any part of this document refers to any third party products or services it shall not be deemed a license grant by st for the use of such third party products or services, or any intellectual property contained therein or considered as a warranty covering the use in any manner whatsoev er of such third party products or services or any intellectual property contained therein. unless otherwise set forth in st?s terms and conditions of sale st disclaims any express or implied warranty with respect to the use and/or sale of st products including without limitation implied warranties of merchantability, fitness for a particular purpose (and their equivalents under the laws of any jurisdiction), or infringement of any patent, copyright or other intellectual property right. st products are not designed or authorized for use in: (a) safety critical applications such as life supporting, active implanted devices or systems with product functional safety requirements; (b) aeronautic applications; (c) automotive applications or environments, and/or (d) aerospace applications or environments. where st products are not designed for such use, the purchaser shall use products at purchaser?s sole risk, even if st has been informed in writing of such usage, unless a product is expressly designated by st as being intended for ?automotive, automotive safety or medical? industry domains according to st product design specifications. products formally escc, qml or jan qualified are deemed suitable for use in aerospace by the corresponding governmental agency. resale of st products with provisions different from the statements and/or technical features set forth in this document shall immediately void any warranty granted by st for the st product or service described herein and shall not create or extend in any manner whatsoev er, any liability of st. st and the st logo are trademarks or registered trademarks of st in various countries. information in this document supersedes and replaces all information previously supplied. the st logo is a registered trademark of stmicroelectronics. all other names are the property of their respective owners. ? 2014 stmicroelectronics - all rights reserved stmicroelectronics group of companies australia - belgium - brazil - canada - china - czech republic - finland - france - germany - hong kong - india - israel - ital y - japan - malaysia - malta - morocco - philippines - singapore - spain - sweden - switzerland - united kingdom - united states of america www.st.com

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